The DM4005 is a high-speed D-type flip flop fabricated using 1-μm HBT GaAs technology. Its high output voltage, excellent rise and fall time and the high eye diagram quality at all clock frequencies makes the DM4005 suitable for very high speed and complex digital applications such as decision circuits, waveform shaping, register implementation, and timing adjustment. The device consists of a master-slave latch designed using an ECL topology guarantee highspeed operation. The data and clock inputs and data outputs are DC coupled. At the data input port, the DM4005 tolerates a wide range of operating conditions, and the internal 50-ohm resistors avoid the need for external terminations for impedance matching. The DM4005 uses SCFL I/O levels and allows either single-ended or differential data input and output. For the clock, a single-ended, DC-coupled input with an internal 50-ohm resistor followed by a DC block is provided. An amplitude of 700 mV peak-to-peak for the clock is recommended, although depending on the operating frequency, a lower amplitude may be usable. An on-chip output buffer provides an excellent eye diagram at a 12.5 GHz clock frequency.

• 2-13 GHz clock frequency range
• 900 mVpp single ended output dynamic
• Output rise time (20%-80%): 28 ps
• Output fall time (20%-80%): 27 ps
• DC coupled clock input
• DC coupled data input
• Peak-to-peak Jitter < 5 ps
• 50 ohm matched DC-coupled data output
• Differential or single-ended inputs
• Low power consumption:
  1 W at -5.2 V (VQH = 0.0 V, VQL = -0.9 V)
  0.7 W at -4.5 V (VQH = 0.0 V, VQL = -0.6 V)
  0.5 W at -4.0 V (VQH = 0.0 V, VQL = -0.4 V)
• Available in Plastic QFN4x416L package or die

Please download datasheet or our product review (Acrobat Reader needed).

Application Notes