The DM4131 is a high-speed X2 clock multiplier fabricated using 1-μm HBT GaAs technology and employs an ECL topology to guarantee high-speed operation. It is an excellent choice for digital clock multiplication, instrumentation, and edge detection. Digital clock multiplication is implemented via XOR operation between the input clock and an internal delayed replica. Several embedded electrically-controlled phase delays are also employed. Suitable regulation of the phase delay voltage controls allows duty cycle control on the clock outputs. Suitable power supply internal distribution provides the ability to disable the echo input which reduces power consumption. The DM4134 can also be stimulated via NRZ data to perform edge detection. A dedicated temperature monitoring pin is also provided.

• Clock input range: 2 to 4 GHz
• 900 mVpp typical single-ended output
• Input sensitivity: Single-ended input >200 mV
• Jitter RMS <1 ps
• 50-ohm matched inputs and outputs (DC)
• Data rate range: 20 NRZ (12.5 RZ) Gb/s
• Compatible SCFL I/O levels
• Differential or single-ended I/O
• Duty cycle control
• Echo inputs available
• Power consumption: 1.4 W
• 5x5mm Plastic QFN or die

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Application Notes